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Re^2: Someone please verify this. (Verilog::VCD)by Anonymous Monk |
on Jan 22, 2012 at 05:21 UTC ( [id://949219]=note: print w/replies, xml ) | Need Help?? |
I think the Verilog::VCD module is just a VCD parser.
Is there any module out there that can make creating VCDs easier?
Thanks.
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