use strict;
use warnings;

open (IN1, "<design_modify1.vhd") or die;
open (OUT, ">output_file.vhd") or die;
open (IN2, "<nets.txt") or die;
open (IN3, "<enabled_nets.txt") or die;
my @nets = <IN2>;
my @enabled_nets = <IN3>;
chomp @nets;
chomp @enabled_nets;
while (<IN1>) {
print OUT;
	foreach my $i (0..$#nets){
		print OUT if (s/\=\>\s+$nets[$i]\,/\=\> $enabled_nets[$i]\,/);
	#}
	
}
close (IN1);
close (OUT);
close (IN2);
close (IN3);

##</code><code>##

VCC_i : VCC port map(Y => \VCC\);
    
    sum_1_SUM0_0 : XOR3 port map(A => b_e, B => a_e, C => c_e, Y => sum_c);
        
    carry_pad : OUTBUF port map(D => N_5, PAD => carry);
    
    a_pad : INBUF port map(PAD => a, Y => a_c);

##</code><code>##

VCC_i : VCC port map(Y => \VCC\);
    
    sum_1_SUM0_0 : XOR3 port map(A => b_c, B => a_c, C => c_c, Y => sum_c);
    sum_1_SUM0_0 : XOR3 port map(A => b_c, B => a_e, C => c_c, Y => sum_c);
    sum_1_SUM0_0 : XOR3 port map(A => b_e, B => a_e, C => c_c, Y => sum_c);
    sum_1_SUM0_0 : XOR3 port map(A => b_e, B => a_e, C => c_e, Y => sum_c);
    
    carry_pad : OUTBUF port map(D => N_5, PAD => carry);
    
    a_pad : INBUF port map(PAD => a, Y => a_c);