enable_pad : INBUF port map (PAD => enable, Y => enable_c); c_pad : INBUF port map(PAD => c, Y => c_c); b_pad : INBUF port map(PAD => b, Y => b_c); sum_pad : OUTBUF port map(D => sum_c, PAD => sum); VCC_i_0 : VCC port map(Y => VCC_0); VCC_i : VCC port map(Y => \VCC\); Sum_O : XOR3 port map(A => b_c, B => a_c, C => enableandc, Y => sum_c); carry_pad : OUTBUF port map(D => N_5, PAD => carry); a_pad : INBUF port map(PAD => a, Y => a_c); GND_i_0 : GND port map(Y => GND_0); GND_i : GND port map(Y => \GND\); Carry_O : MAJ3 port map(A => a_c, B => enableandc, C => b_c, Y => N_5); modify : XOR2 port map (A=> c_c, B=> enable_c, Y => enableandc);